What Is Digital Logic AND Gate? Its Symbols, Schematic Designs & IC Details
Table of Contents
Digital Logic AND Gate
The type of Logic gate which generate logic True when all of its inputs are logic True is known as AND gate.
A digital circuit which performs or implements any Boolean operation is called logic gate. Boolean operations are logical operations based on Binary numbers. Logical multiplication, logical addition are examples of Boolean operation.
AND gate can have two or more than two inputs but it has only one output.
Symbol:
There are three different symbols used for AND gate.
ANSI
The American National standard Institute symbol, it is the most commonly used symbol:
IEC
The International Electrotechnical Commission symbol:
DIN
Deutsches Institut für Normung symbol for AND gate used in Germany:
Truth Table
The truth table is a logic table, which contains different combinations of input & the output for each of the input combination.
Assume 2-input AND gate with inputs I_{1} & I_{2 }& output O. As we know that AND gate implements logical multiplication. The logical operation operates on binary numbers 1 & 0.
If we apply multiplication on these inputs i.e.
I_{1 }X I_{2 }= O
0 X 0 = 0
0 X 1 = 0
1 X 0 = 0
1 X 1 = 1
This can be easily shown using a truth table as shown below.
Input | Output | |
I_{1} | I_{2} | O |
0 | 0 | 0 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 1 |
Expression
The expression for AND gate operation is
O = I_{1 }. I_{2 } or O = I_{1 }& I_{2}
AND operation is denoted by dot (.) or (&) symbol.
Multi-Input AND Gate
As we know, AND gate can have more than 2 inputs. So the output of multi-input AND gate is high only when all of its inputs are High.
Consider a 3-input AND gate with input I_{1}, I_{2}, I_{3 }and O as output.
The truth table for 3-input AND gate is:
Input | Output | ||
I_{1} | I_{2} | I_{3} | O |
0 | 0 | 0 | 0 |
0 | 0 | 1 | 0 |
0 | 1 | 0 | 0 |
0 | 1 | 1 | 0 |
1 | 0 | 0 | 0 |
1 | 0 | 1 | 0 |
1 | 1 | 0 | 0 |
1 | 1 | 1 | 1 |
The expression of 3-input AND gate will be
O = I_{1} . I_{2 }. I_{3 } or O = I_{1} & I_{2 }& I_{3}
Schematic
There are more than one schematic designs for AND gate. In this article, we will discuss RDL (Resistor-diode logic) & RTL (Resistor-Transistor logic).
Resistor-Diode Logic
This logic uses only diodes & resistors to perform some operation. The schematic design of AND gate in RDL is given below:
Explanation
This schematic works on 5v as V_{s} supply voltage. I_{1} & I_{2 }is the input logic for this schematic & O as taken as the output.
Let’s test the design for each combination of input logic. Take note that the input High logic is 5v & Low logic is 0v or GND (ground).
Case 1
The first case is that both inputs I_{1 }& I_{2 }= 0 then the schematic will operate as:
When we apply 0v or GND to the negative terminal of the diodes, the diodes become forward biased & it starts the flow of current. There is a fixed voltage drop of diode i.e. 0.7v in case of silicon diode or 0.4v in case of germanium diode. The rest of the potential will be developed across the resistor R.
So the output O will be equal to the v_{d }= 0.4v or 0.7v, which is equivalent to the logic Low.
Case 2
The second case is that if one of the input is high i.e I_{1} = 0 & I_{2 }= 1.
In such case, one of the diodes is in the forward bias because its negative terminal is connected to the GND (ground) & the other diode is in reverse bias because its negative terminal is connected with 5v.
The forward bias diode will allow the current flow through itself. Due to this flow of current, the significant voltage drop will remain across the resistor R same as in the previous case. A fixed voltage drop across diodes and the remaining potential is developed across the resistor R.
So the output voltage O= V_{d} = 0.4v or 0.7v, which is logic low. So the output is logic Low.
Case 3
The third case is when both of the inputs are high i.e. I_{1 }& I_{2 }= 5v.
When High input 5v is applied to the negative terminals of the diodes, the diodes becomes reverse biased & they block the flow of current through it. As a result, the supply voltage V_{s }appears as the output O = 5v. Thus the output becomes logic High.
Resistor-Transistor Logic
This logic uses transistor & resistor to implement any function. The schematic design of AND gate in resistor-transistor logic is given below:
Explanation
The input of this AND gate schematic is I_{1}, I_{2 }& the output is O. The input voltage supply V_{s }is 5v. The input is fed to the gates of the transistor & the output is taken across the resistor R.
The two NPN transistors are connected in series. One of their terminals (Collector) is connected to V_{s }& the other terminal (Emitter) is connected with resistor R, which is connected with GND (ground).
We will discuss this schematic for each of the input combinations.
Case 1
The first case is when both inputs are logical Low i.e. I_{1 }& I_{2 }= 0v
Note: NPN transistor switches on when gate input is logic high & it switches off when gate input is logic Low
In this case, the gate voltage of both NPN transistors is 0v (ground). So the transistors will switch off & it will not allow the flow of current. The path for the flow of current from V_{s }to GND breaks.
As there is no current flow, the potential developed across the resistor R is 0v. This voltage drop is the output of the AND gate which is logical Low.
Case 2
The second case is when one of the input is logical High & the other is Low i.e. I_{1 }= 1 & I_{2 }= 0.
In this case, one of the two NPN transistors is switched on, whose gate input is High. The other transistor is switched off & because of this transistor; the current cannot flow through the circuit.
The voltage developed across the resistor R is 0v because there is no current flow. This voltage is the output of the AND gate, which is logic Low or logical 0.
Case 3
The last case is when both of the inputs are logical high i.e. I_{1 }& I_{2 }= 5v.
In this case, the gate input of the both NPN transistor is 5v. Due to which, both transistors are switched on. As a result, the path for the flow of the current is complete & a potential will develop across the resistor R.
The potential developed across resistor R is the output of the AND gate, which in this case is 5v. Thus the output of the AND gate becomes logical High or Logical 1.
Construction From Universal Gates
Universal gates are gates which can be used to implement any logic function.
There are two universal gates i.e. NAND gate & NOR gate.
Construction From NAND Gate
The expression for NAND gate is:
NAND operation = (I_{1 }. I_{2})’
The AND gate can be Implemented using NAND gate if we implement the following expression. The output O will be:
O = (I_{1 }. I_{2})’ ‘
O = I_{1 }. I_{2}
Thus it is clear that the negative or invert of NAND is AND gate as shown in the figure below.
Construction From NOR Gate
The expression for NOR gate is:
(I_{1 }+ I_{2})’ = NOR operation
The expression for AND gate using NOR gate is:
O = {(I_{1 }+ I_{1})’ + (I_{2 }+ I_{2})’ }’
O = {(I_{1})’ + (I_{2})’ }’
O = I_{1} . I_{2}
So the Implementation of AND gate use 3 NOR gates as shown in the figure below.
AND GATE IC
The pin configuration of AND gate IC is given below.
Pin | Detail |
1 | Input 1 Gate 1 |
2 | Input 2 Gate 1 |
3 | Output Gate 1 |
4 | Input 1 Gate 2 |
5 | Input 2 Gate 2 |
6 | Output Gate 2 |
7 | Ground |
8 | Output Gate 3 |
9 | Input 1 Gate 3 |
10 | Input 2 Gate 3 |
11 | Output Gate 4 |
12 | Input 1 Gate 4 |
13 | Input 2 Gate 4 |
14 | Voltage Supply Vcc |
you may also read:
- Boolean Logic And Basic Logic Gates
- The Modulation Concept & Basic Types of Modulation
- Introduction to Signals, Types, Properties, Operation & Application